flashrom

FLASHROM(8) flashrom FLASHROM(8)

NAME

   flashrom - detect, read, write, verify and erase flash chips

SYNOPSIS

   flashrom [-h|-R|-L|-z|
       -p <programmername>[:<parameters>] [-c <chipname>]
         (--flash-name|--flash-size|
           [-E|-x|-r <file>|-w <file>|-v <file>]
           [(-l <file>|--ifd|--fmap|--fmap-file <file>)
             [-i <include>[:<file>]]]
           [--wp-status] [--wp-list] [--wp-enable|--wp-disable]
           [--wp-range <start>,<length>|--wp-region <region>]
           [-n] [-N] [-f])]
     [-V[V[V]]] [-o <logfile>] [--progress]

DESCRIPTION

   flashrom is a utility for detecting, reading, writing, verifying and erasing flash chips.  It's often used to flash BIOS/EFI/coreboot/firmware images in-system using a supported main‐
   board.   However,  it  also supports various external PCI/USB/parallel-port/serial-port based devices which can program flash chips, including some network cards (NICs), SATA/IDE con‐
   troller cards, graphics cards, the Bus Pirate device, various FTDI FT2232/FT4232H/FT4233H/FT232H based USB devices, and more.

   It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40, TSOP48, and BGA chips, which use various protocols such as LPC, FWH, parallel flash, or SPI.

OPTIONS

   You can specify one of -h, -R, -L, -z, -E, -r, -w, -v or no operation.  If no operation is specified, flashrom will only probe for flash chips. It  is  recommended  that  if  you  try
   flashrom  the first time on a system, you run it in probe-only mode and check the output.  Also you are advised to make a backup of your current ROM contents with -r before you try to
   write a new image.  All operations involving any chip access (probe/read/write/...) require the -p/--programmer option to be used (please see below).

   -r, --read <file>
          Read flash ROM contents and save them into the given <file>.  If the file already exists, it will be overwritten.

   -w, --write (<file>|-)
          Write <file> into flash ROM. If - is provided instead, contents will be read from stdin.  This will first automatically erase the chip, then write to it.

          In the process the chip is also read several times. First an in-memory backup is made for disaster recovery and to be able to skip regions that are already equal to  the  image
          file.   This  copy is updated along with the write operation. In case of erase errors it is even re-read completely.  After writing has finished and if verification is enabled,
          the whole flash chip is read out and compared with the input image.

   -n, --noverify
          Skip the automatic verification of flash ROM contents after writing. Using this option is not recommended, you should only use it if you know what you are doing and if you feel
          that the time for verification takes too long.

          Typical usage is:

             flashrom -p prog -n -w <file>

          This option is only useful in combination with --write.

   -N, --noverify-all
          Skip not included regions during automatic verification after writing (cf. -l and -i).  You should only use this option if you are sure that communication with the  flash  chip
          is reliable (e.g. when using the internal programmer).  Even if flashrom is instructed not to touch parts of the flash chip, their contents could be damaged (e.g. due to misun‐
          derstood erase commands).

          This option is required to flash an Intel system with locked ME flash region using the internal programmer.  It may be enabled by default in this case in the future.

   -v, --verify (<file>|-)
          Verify the flash ROM contents against the given <file>.  If - is provided instead, contents will be written to the stdout.

   -E, --erase
          Erase the flash ROM chip.

   -x, --extract
          Extract every region defined on the layout from flash ROM chip to a file with the same name as the extracted region (replacing spaces with underscores).

   -V, --verbose
          More verbose output. This option can be supplied multiple times (max. 3 times, i.e. -VVV ) for even more debug output.

   -c, --chip <chipname>
          Probe  only  for the specified flash ROM chip. This option takes the chip name as printed by flashrom -L without the vendor name as parameter. Please note that the chip name is
          case sensitive.

   -f, --force
          Force one or more of the following actions:

          • Force chip read and pretend the chip is there.

          • Force chip access even if the chip is bigger than the maximum supported size for the flash bus.

          • Force erase even if erase is known bad.

          • Force write even if write is known bad.

   -l, --layout <file>
          Read ROM layout from <file>.

          flashrom supports ROM layouts. This allows you to flash certain parts of the flash chip only.  A ROM layout file contains multiple lines with the following syntax:

             startaddr:endaddr imagename

          startaddr and endaddr are hexadecimal addresses within the ROM file and do not refer to any physical address.  Please note that using a 0x prefix for those hexadecimal  numbers
          is not necessary, but you can't specify decimal/octal numbers.  imagename is an arbitrary name for the region/image from startaddr to endaddr (both addresses included).

          Example:

             00000000:00008fff gfxrom
             00009000:0003ffff normal
             00040000:0007ffff fallback

          If you only want to update the image named normal in a ROM based on the layout above, run:

             flashrom -p prog --layout rom.layout --image normal -w some.rom

          To update only the images named normal and fallback, run:

             flashrom -p prog -l rom.layout -i normal -i fallback -w some.rom

          Overlapping sections are not supported.

   --fmap Read layout from fmap in flash chip.

          flashrom supports the fmap binary format which is commonly used by coreboot for partitioning a flash chip.  The on-chip fmap will be read and used to generate the layout.

          If you only want to update the COREBOOT region defined in the fmap, run:

             flashrom -p prog --fmap --image COREBOOT -w some.rom

   --fmap-file <file>
          Read layout from a <file> containing binary fmap (e.g. coreboot roms).

          flashrom supports the fmap binary format which is commonly used by coreboot for partitioning a flash chip.  The fmap in the specified file will be read and used to generate the
          layout.

          If you only want to update the COREBOOT region defined in the binary fmap file, run:

             flashrom -p prog --fmap-file some.rom --image COREBOOT -w some.rom

   --ifd  Read ROM layout from Intel Firmware Descriptor.

          flashrom  supports ROM layouts given by an Intel Firmware Descriptor (IFD).  The on-chip descriptor will be read and used to generate the layout. If you need to change the lay‐
          out, you have to update the IFD only first.

          The following ROM images may be present in an IFD:
             fd    - the IFD itself
             bios  - the host firmware aka. BIOS
             me    - Intel Management Engine firmware
             gbe   - gigabit ethernet firmware
             pd    - platform specific data

   -i, --include <region>[:<file>]
          Read or write only <region> to or from ROM.  The -i option may be used multiple times if the user wishes to read or write multiple regions using a single command.

          The user may optionally specify a corresponding <file> for any region they wish to read or write.  A read operation will read the corresponding regions from ROM and write indi‐
          vidual files for each one.  A write option will read file(s) and write to the corresponding region(s) in ROM.

          For write operations, files specified using -i take precedence over content from the argument to -w.

          Examples:
                 To read regions named foo and bar in layout file <layout> into region-sized files foo.bin and bar.bin, run:

                    flashrom -p prog -l <layout> -i foo:foo.bin -i bar:bar.bin -r rom.bin

                 To write files foo.bin and bar.bin into regions named foo and bar in layout file <layout> to the ROM, run:

                    flashrom -p prog -l <layout> -i foo:foo.bin -i bar:bar.bin -w rom.bin

   --wp-status
          Prints the flash's current status register protection mode and write protection range.

   --wp-list
          Prints a list of all protection ranges that the flash supports.

   --wp-enable
          Enables hardware status register protection (SRP) if the flash supports it.  Once SRP is enabled, operations that change the flash's status  registers  (including  --wp-disable
          and --wp-range) can only be performed if the flash's #WP pin is at an inactive logic level.

   --wp-disable
          Disables status register protection if the flash allows it.

   --wp-range <start>,<length>
          Configures the flash to protect a range of addresses from <start> to (<start> + <length> - 1), bounds inclusive.  The range must be supported by the flash, see --wp-list.

   --wp-region <region>
          Same  as --wp-range but protects the range occupied by an image region.  This option requires a image layout to be specified, see --layout.  The region must be supported by the
          flash, see --wp-list.

   --flash-name
          Prints out the detected flash chip's name.

   --flash-size
          Prints out the detected flash chip's size.

   --flash-contents <ref-file>
          The file contents of <ref-file> will be used to decide which parts of the flash need to be written.  Providing this saves an initial read of the full flash chip.   Be  careful,
          if the provided data doesn't actually match the flash contents, results are undefined.

   -L, --list-supported
          List the flash chips, chipsets, mainboards, and external programmers (including PCI, USB, parallel port, and serial port based devices) supported by flashrom.

          There  are many unlisted boards which will work out of the box, without special support in flashrom.  Please let us know if you can verify that other boards work or do not work
          out of the box.

          IMPORTANT: For verification you have to test an ERASE and/or WRITE operation, so make sure you only do that if you have proper means to recover from failure!

   -z, --list-supported-wiki
          Same  as  --list-supported,  but  outputs  the  supported  hardware  in  MediaWiki  syntax,  so  that  it  can  be  easily  pasted  into  the  supported  hardware   wiki   page
          <https://flashrom.org/Supported_hardware>.  Please note that MediaWiki output is not compiled in by default.

   -p, --programmer <name>[:parameter[,parameter[,parameter]]]
          Specify the programmer device. This is mandatory for all operations involving any chip access (probe/read/write/...).  Currently supported are:

          • internal            (for in-system flashing in the mainboard)

          • dummy               (virtual programmer for testing flashrom)

          • nic3com             (for flash ROMs on 3COM network cards)

          • nicrealtek          (for flash ROMs on Realtek and SMC 1211 network cards)

          • nicnatsemi          (for flash ROMs on National Semiconductor DP838* network cards)

          • nicintel            (for parallel flash ROMs on Intel 10/100Mbit network cards)

          • gfxnvidia           (for flash ROMs on NVIDIA graphics cards)

          • drkaiser            (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)

          • satasii             (for flash ROMs on Silicon Image SATA/IDE controllers)

          • satamv              (for flash ROMs on Marvell SATA controllers)

          • atahpt              (for flash ROMs on Highpoint ATA/RAID controllers)

          • atavia              (for flash ROMs on VIA VT6421A SATA controllers)

          • atapromise          (for flash ROMs on Promise PDC2026x ATA/RAID controllers)

          • it8212              (for flash ROMs on ITE IT8212F ATA/RAID controller)

          • ft2232_spi          (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer)

          • serprog             (for flash ROMs attached to a programmer speaking serprog, including some Arduino-based devices)

          • buspirate_spi       (for SPI flash ROMs attached to a Bus Pirate)

          • dediprog            (for SPI flash ROMs attached to a Dediprog SF100)

          • rayer_spi           (for SPI flash ROMs attached to a parallel port by one of various cable types)

          • raiden_debug_spi    (For Chrome EC based debug tools - SuzyQable, Servo V4, C2D2 & uServo)

          • pony_spi            (for SPI flash ROMs attached to a SI-Prog serial port bitbanging adapter)

          • nicintel_spi        (for SPI flash ROMs on Intel Gigabit network cards)

          • ogp_spi             (for SPI flash ROMs on Open Graphics Project graphics card)

          • linux_mtd           (for SPI flash ROMs accessible via /dev/mtdX on Linux)

          • linux_spi           (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)

          • usbblaster_spi      (for SPI flash ROMs attached to an Altera USB-Blaster compatible cable)

          • nicintel_eeprom     (for SPI EEPROMs on Intel Gigabit network cards)

          • mstarddc_spi        (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)

          • pickit2_spi         (for SPI flash ROMs accessible via Microchip PICkit2)

          • ch341a_spi          (for SPI flash ROMs attached to WCH CH341A)

          • ch347_api           (for SPI flash ROMs attached to WHC CH347)

          • digilent_spi        (for SPI flash ROMs attached to iCEblink40 development boards)

          • jlink_spi           (for SPI flash ROMs attached to SEGGER J-Link and compatible devices)

          • ni845x_spi          (for SPI flash ROMs attached to National Instruments USB-8451 or USB-8452)

          • stlinkv3_spi        (for SPI flash ROMs attached to STMicroelectronics STLINK V3 devices)

          • realtek_mst_i2c_spi (for SPI flash ROMs attached to Realtek DisplayPort hubs accessible through I2C)

          • parade_lspcon       (for SPI flash ROMs attached to Parade Technologies LSPCONs (PS175))

          • mediatek_i2c_spi    (for SPI flash ROMs attached to some Mediatek display devices accessible over I2C)

          • dirtyjtag_spi       (for SPI flash ROMs attached to DirtyJTAG-compatible devices)

          • asm106x             (for SPI flash ROMs attached to asm106x PCI SATA controllers)

          Some  programmers  have  optional or mandatory parameters which are described in detail in the PROGRAMMER-SPECIFIC INFORMATION section. Support for some programmers can be dis‐
          abled at compile time.  flashrom -h lists all supported programmers.

   -h, --help
          Show a help text and exit.

   -o, --output <logfile>
          Save the full debug log to <logfile>.  If the file already exists, it will be overwritten. This is the recommended way to gather logs from flashrom because they will be verbose
          even if the on-screen messages are not verbose and don't require output redirection.

   --progress
          [Experimental feature] Show progress percentage of operations on the standard output.

   -R, --version
          Show version information and exit.

PROGRAMMER-SPECIFIC INFORMATION

   Some programmer drivers accept further parameters to set programmer-specific parameters. These parameters are separated from the programmer name by a  colon.  While  some  programmers
   take  arguments atfixed positions, other programmers use a key/value interface in which the key and value is separated by an equal sign and different pairs are separated by a comma or
   a colon.

internal programmer

   Board Enables
          Some mainboards require to run mainboard specific code to enable flash erase and write support (and probe support on old systems with parallel flash).  The mainboard brand  and
          model  (if  it  requires specific code) is usually autodetected using one of the following mechanisms: If your system is running coreboot, the mainboard type is determined from
          the coreboot table.  Otherwise, the mainboard is detected by examining the onboard PCI devices and possibly DMI info.  If PCI and DMI do not  contain  information  to  uniquely
          identify the mainboard (which is the exception), or if you want to override the detected mainboard model, you can specify the mainboard using the:

             flashrom -p internal:mainboard=<vendor>:<board>

          syntax.

          See  the  Known  boards  or  Known  laptops section in the output of flashrom -L for a list of boards which require the specification of the board name, if no coreboot table is
          found.

          Some of these board-specific flash enabling functions (called board enables ) in flashrom have not yet been tested.  If your mainboard is detected needing an untested board en‐
          able function, a warning message is printed and the board enableis not executed, because a wrong board enable function might cause the system to behave  erratically,  as  board
          enable  functions  touch  the  low-level  internals of a mainboard.  Not executing a board enable function (if one is needed) might cause detection or erasing failure.  If your
          board protects only part of the flash (commonly the top end, called boot block), flashrom might encounter an error only after erasing the unprotected part, so  running  without
          the board-enable function might be dangerous for erase and write (which includes erase).

          The suggested procedure for a mainboard with untested board specific code is to first try to probe the ROM (just invoke flashrom and check that it detects your flash chip type)
          without running the board enable code (i.e. without any parameters). If it finds your chip, fine. Otherwise, retry probing your chip with the board-enable code running, using:

             flashrom -p internal:boardenable=force

          If  your  chip  is still not detected, the board enable code seems to be broken or the flash chip unsupported.  Otherwise, make a backup of your current ROM contents (using -r)
          and store it to a medium outside of your computer, like a USB drive or a network share. If you needed to run the board enable code already for probing, use it for reading  too.
          If  reading  succeeds  and the contents of the read file look legit you can try to write the new image.  You should enable the board enable code in any case now, as it has been
          written because it is known that writing/erasing without the board enable is going to fail. In any case (success or failure), please report to the flashrom  mailing  list,  see
          below.

   Coreboot
          On  systems  running  coreboot, flashrom checks whether the desired image matches your mainboard.  This needs some special board ID to be present in the image.  If flashrom de‐
          tects that the image you want to write and the current board do not match, it will refuse to write the image unless you specify:

             flashrom -p internal:boardmismatch=force

   ITE IT87 Super I/O
          If your mainboard is manufactured by GIGABYTE and supports DualBIOS it is very likely that it uses an ITE IT87 series Super I/O to switch between the two flash chips.  Only one
          of them can be accessed at a time and you can manually select which one to use with the:

             flashrom -p internal:dualbiosindex=chip

          syntax where chip is the index of the chip to use (0 = main, 1 = backup).  You can check which one is currently selected by leaving out the chip parameter.

          If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus translation, flashrom should autodetect that configuration.  If you want to set the I/O base port of
          the IT87 series SPI controller manually instead of using the value provided by the BIOS, use the:

             flashrom -p internal:it87spiport=portnum

          syntax where portnum is the I/O port number (must be a multiple of 8).  In the unlikely case flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a  bug  report
          so we can diagnose the problem.

   AMD chipsets
          Beginning  with the SB700 chipset there is an integrated microcontroller (IMC) based on the 8051 embedded in every AMD southbridge.  Its firmware resides in the same flash chip
          as the host's which makes writing to the flash risky if the IMC is active.  Flashrom tries to temporarily disable the IMC but even then changing the contents of the  flash  can
          have  unwanted effects: when the IMC continues (at the latest after a reboot) it will continue executing code from the flash.  If the code was removed or changed in an unfortu‐
          nate way it is unpredictable what the IMC will do.  Therefore, if flashrom detects an active IMC it will disable write support unless the user forces it with the:

             flashrom -p internal:amd_imc_force=yes

          syntax. The user is responsible for supplying a suitable image or leaving out the IMC region with the help of a layout file.  This limitation might be  removed  in  the  future
          when we understand the details better and have received enough feedback from users.  Please report the outcome if you had to use this option to write a chip.

          An optional spispeed parameter specifies the frequency of the SPI bus where applicable (i.e.SB600 or later with an SPI flash chip directly attached to the chipset).  Syntax is:

             flashrom -p internal:spispeed=frequency

          where frequency can be '16.5 MHz', '22 MHz', '33 MHz', '66 MHz', '100 MHZ', or '800 kHz'.  Support of individual frequencies depends on the generation of the chipset:

          • SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz.  The default is to use 16.5 MHz and disable Fast Reads.

          • SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz.  The default is to use 16.5 MHz and disable Fast Reads.

          • Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them.  The default is to use the frequency that is currently configured.

          An optional spireadmode parameter specifies the read mode of the SPI bus where applicable (Bolton or later).  Syntax is:

             flashrom -p internal:spireadmode=mode

          where mode can be 'Normal (up to 33 MHz)', 'Normal (up to 66 MHz)', 'Dual IO (1-1-2)', 'Quad IO (1-1-4)', 'Dual IO (1-2-2)', 'Quad IO (1-4-4)', or 'Fast Read'.

          The default is to use the read mode that is currently configured.

   Intel chipsets
          If  you  have an Intel chipset with an ICH8 or later southbridge with SPI flash attached, and if a valid descriptor was written to it (e.g. by the vendor), the chipset provides
          an alternative way to access the flash chip(s) named Hardware Sequencing.  It is much simpler than the normal access method (called Software Sequencing), but does not allow the
          software to choose the SPI commands to be sent. You can use the:

             flashrom -p internal:ich_spi_mode=value

          syntax where value can be auto, swseq or hwseq. By default (or when setting ich_spi_mode=auto) the module tries to use swseq and only activates hwseq if need be (e.g. if impor‐
          tant opcodes are inaccessible due to lockdown; or if more than one flash chip is attached). The other options (swseq, hwseq) select the respective mode (if possible).

          ICH8 and later southbridges may also have locked address ranges of different kinds if a valid descriptor was written to it.  The flash address space is then partitioned in mul‐
          tiple so called "Flash Regions" containing the host firmware, the ME firmware and so on respectively. The flash descriptor can also specify up to 5 so called Protected Regions,
          which are freely chosen address ranges independent from the aforementioned Flash Regions.  All of them can be write and/or read protected individually.

          If you have an Intel chipset with an ICH2 or later southbridge and if you want to set specific IDSEL values for a non-default flash chip or an embedded controller (EC), you can
          use the:

             flashrom -p internal:fwh_idsel=value

          syntax where value is the 48-bit hexadecimal raw value to be written in the IDSEL registers of the Intel southbridge.  The upper 32 bits use one hex digit each per 512 kB range
          between 0xffc00000 and 0xffffffff, and the lower 16 bits use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.  The rightmost hex digit  corresponds  with
          the  lowest address range. All address ranges have a corresponding sister range 4 MB below with identical IDSEL settings. The default value for ICH7 is given in the example be‐
          low.

          Example:

             flashrom -p internal:fwh_idsel=0x001122334567

   Laptops
          Using flashrom on older laptops that don't boot from the SPI bus is dangerous and may easily make your hardware unusable (see also the BUGS section).  The  embedded  controller
          (EC)  in  some machines may interact badly with flashing.  More information is in the wiki <https://flashrom.org/Laptops>.  Problems occur when the flash chip is shared between
          BIOS and EC firmware, and the latter does not expect flashrom to access the chip. While flashrom tries to change the contents of that memory the EC might need to fetch new  in‐
          structions  or  data  from it and could stop working correctly. Probing for and reading from the chip may also irritate your EC and cause fan failure, backlight failure, sudden
          poweroff, and other nasty effects. flashrom will attempt to detect if it is running on such a laptop and limit probing to SPI buses. If you want to probe the LPC bus anyway  at
          your own risk, use:

             flashrom -p internal:laptop=force_I_want_a_brick

          We will not help you if you force flashing on a laptop because this is a really dumb idea.

          You have been warned.

          Currently  we rely on the chassis type encoded in the DMI/SMBIOS data to detect laptops. Some vendors did not implement those bits correctly or set them to generic and/or dummy
          values. flashrom will then issue a warning and restrict buses like above.  In this case you can use:

             flashrom -p internal:laptop=this_is_not_a_laptop

          to tell flashrom (at your own risk) that it is not running on a laptop.

dummy programmer

   The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various aspects of flashrom and is mainly used in development  and  while  debugging.
   It is able to emulate some chips to a certain degree (basic identify/read/erase/write operations work).

   An optional parameter specifies the bus types it should support. For that you have to use the:

      flashrom -p dummy:bus=[type[+type[+type]]]

   syntax where type can be parallel, lpc, fwh, spi in any order. If you specify bus without type, all buses will be disabled. If you do not specify bus, all buses will be enabled.

   Example:

      flashrom -p dummy:bus=lpc+fwh

   The dummy programmer supports flash chip emulation for automated self-tests without hardware access.  If you want to emulate a flash chip, use the:

      flashrom -p dummy:emulate=chip

   syntax where chip is one of the following chips (please specify only the chip name, not the vendor):

   • ST           M25P10.RES      SPI flash chip (128 kB, RES, page write)

   • SST          SST25VF040.REMS SPI flash chip (512 kB, REMS, byte write)

   • SST          SST25VF032B     SPI flash chip (4096 kB, RDID, AAI write)

   • Macronix     MX25L6436       SPI flash chip (8192 kB, RDID, SFDP)

   • Winbond      W25Q128FV       SPI flash chip (16384 kB, RDID)

   • Spansion     S25FL128L       SPI flash chip (16384 kB, RDID)

   • Dummy vendor VARIABLE_SIZE   SPI flash chip (configurable size, page write)

   Example:

      flashrom -p dummy:emulate=SST25VF040.REMS

   To use VARIABLE_SIZE chip, size must be specified to configure the size of the flash chip as a power of two.

   Example:

      flashrom -p dummy:emulate=VARIABLE_SIZE,size=16777216,image=dummy.bin

   Persistent images
          If you use flash chip emulation, flash image persistence is available as well by using the:

             flashrom -p dummy:emulate=chip,image=image.rom

          syntax where image.rom is the file where the simulated chip contents are read on flashrom startup and where the chip contents on flashrom shutdown are written to.

          Example:

             flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin

   SPI write chunk size
          If you use SPI flash chip emulation for a chip which supports SPI page write with the default opcode, you can set the maximum allowed write chunk size with the:

             flashrom -p dummy:emulate=chip,spi_write_256_chunksize=size

          syntax where size is the number of bytes (min.& 1, max.& 256).  Example:

             flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5

   SPI blacklist
          To simulate a programmer which refuses to send certain SPI commands to the flash chip, you can specify a blacklist of SPI commands with the:

             flashrom -p dummy:spi_blacklist=commandlist

          syntax  where ommandlist is a list of two-digit hexadecimal representations of SPI commands.  If commandlist is e.g. 0302, flashrom will behave as if the SPI controller refuses
          to run command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512 characters (256 commands) long.  Implementation note: flashrom will detect  an  error  during
          command execution.

   SPI ignorelist
          To simulate a flash chip which ignores (doesn't support) certain SPI commands, you can specify an ignorelist of SPI commands with the:

             flashrom -p dummy:spi_ignorelist=commandlist

          syntax  where  commandlist  is  a  list of two-digit hexadecimal representations of SPI commands.  If commandlist is e.g. 0302, the emulated flash chip will ignore command 0x03
          (READ) and command 0x02 (WRITE).  commandlist may be up to 512 characters (256 commands) long.  Implementation note: flashrom won't detect an error during command execution.

   SPI status register
          You can specify the initial content of the chip's status register with the:

             flashrom -p dummy:spi_status=content"

          syntax where content is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to SR1, 0x22 to SR2 and 0x33 to SR3. Shorter value is padded to  24  bits  with
          zeroes on the left.  See datasheet for chosen chip for details about the registers content.

   Write protection
          Chips with emulated WP: W25Q128FV, S25FL128L.

          You can simulate state of hardware protection pin (WP) with the:

             flashrom -p dummy:hwwp=state

          syntax  where  state  is yes or no (default value). yes means active state of the pin implies that chip is write-protected (on real hardware the pin is usually negated, but not
          here).

nic3com, nicrealtek, nicnatsemi, nicintel, nicintel_eeprom, nicintel_spi, gfxnvidia, ogp_spi, drkaiser, satasii, satamv, atahpt, atavia, atapromise, it8212 programmers

   These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported by the  selected  programmer  is  in‐
   stalled in your system. The syntax is:

      flashrom -p xxxx:pci=bb:dd.f

   where xxxx is the name of the programmer, bb is the PCI bus number, dd is the PCI device number, and b is the PCI function number of the desired device. Example:

      flashrom -p nic3com:pci=05:04.0

atavia programmer

   Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the:

      flashrom -p atavia:offset=addr

   syntax  where  addr  will  be  interpreted  as  usual  (leading  0x  (0)  for  hexadecimal  (octal)  values,  or  else  decimal).   For  more  information  please  see  its  wiki page
   <https://flashrom.org/VT6421A"itswikipage>.

atapromise programmer

   This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip. This stems from the fact that, on the tested device (a Promise Ultra100),  not  all  of
   the chip's address lines were actually connected.  You may use this programmer to flash firmware updates, since these are only 16 kB in size (padding to 32 kB is required).

nicintel_eeprom programmer

   This  is the first programmer module in flashrom that does not provide access to NOR flash chips but EEPROMs mounted on gigabit Ethernet cards based on Intel's 82580 NIC. Because EEP‐
   ROMs normally do not announce their size nor allow themselves to be identified, the controller relies on correct size values written to predefined addresses within the chip.  Flashrom
   follows this scheme but assumes the minimum size of 16 kB (128 kb) if an unprogrammed EEPROM/card is detected.  Intel specifies following EEPROMs  to  be  compatible:  Atmel  AT25128,
   AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128.